Title:
TIME BASE CORRECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS62128065
Kind Code:
A
Abstract:
PURPOSE:To directly correct the time base variance of a high frequency signal with a simple circuit constitution by varying the supply voltage of a delay circuit by the detection signal of a time base error detecting circuit to control the delay time of the delay circuit and compensating the time base variance of a signal to be controlled. CONSTITUTION:Delay circuits 13 and 14 consisting of inverters 12 or buffers using P-channel and N-channel field effect transistors 10 and 11 and time base error detecting circuits 15 and 16 which detect the time base error between output signals of these delay circuits 13 and 14 and a prescribed reference signal are provided. Supply voltages of delay circuits 13 and 14 are varied by detection signals of time base error detecting circuits 15 and 16 to control the delay time of delay circuits 13 and 14, and the time baser variance of the signal to be controlled is correct. Thus, the time base variance of an FM signal, a PM signal, and a PSK signal is compensated with the simple circuit constitution.
Inventors:
YAMATANI WATARU
Application Number:
JP26865685A
Publication Date:
June 10, 1987
Filing Date:
November 29, 1985
Export Citation:
Assignee:
SONY CORP
International Classes:
G11B20/06; G11B7/00; G11B7/004; H03H11/26; H03K5/00; H03K5/13; H03L7/00; H04N5/95; H04N5/953; (IPC1-7): G11B7/00; G11B20/06; H03H11/26; H03K5/00; H03K5/13; H03L7/00; H04N5/95
Attorney, Agent or Firm:
Sada Ito (1 person outside)