Title:
TIME-DIVISION MULTIPLE CONTROLLER
Document Type and Number:
Japanese Patent JPH11272425
Kind Code:
A
Abstract:
To manage plural DMA queues and related functions by a single engine for a storage device with a large capacity such as an RAID array.
An engine is operated at a proper high speed clock speed so that each bus can be operated substantially with optimal frequencies, and a primary bus is time-multiplexed so that the high efficiency of data through-put can be maintained. Moreover, when access to an RAID engine 260 is not requested to the remaining bus, an additional phase is assigned to a DMA addressing function so that the efficiency can be further improved.
Inventors:
ROGANTI ADRIANO
SMITH RONALD BRUCE
BASCO JOSE PLATON
WILLE THOMAS
SMITH RONALD BRUCE
BASCO JOSE PLATON
WILLE THOMAS
Application Number:
JP35066698A
Publication Date:
October 08, 1999
Filing Date:
November 04, 1998
Export Citation:
Assignee:
AIWA CO
International Classes:
G06F13/00; G06F13/28; G06F3/06; (IPC1-7): G06F3/06; G06F3/06
Attorney, Agent or Firm:
Akira Asamura (3 outside)
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