Title:
TIMER DEVICE
Document Type and Number:
Japanese Patent JP3008686
Kind Code:
B2
Abstract:
PURPOSE: To prevent the generation of useless CPU time consumption due to the output of an unnecessary interruption signal and to attain higher counting accuracy.
CONSTITUTION: In a timer device having a capture function, the output timing of an interruption signal 1005 outputted from a timer is determined by a CPU 1000, a value set up by the CPU 1000 is stored and the effective input pulses of a captue event 3000 applied from the external are counted up. An output control output register 1001 for outputting an interruption signal 1005 to the CPU 1000 when the counted value coincides with the value set up by the CPU 1000 controls the output timing of an interruption signal 1005 to the CPU 1000.
Inventors:
Kobayashi Katsue
Application Number:
JP21287692A
Publication Date:
February 14, 2000
Filing Date:
August 10, 1992
Export Citation:
Assignee:
NEC
International Classes:
G06F9/48; G01P3/489; G01R23/10; G06F9/46; (IPC1-7): G06F9/46; G01P3/489; G01R23/10; G06F9/46
Domestic Patent References:
JP6295467A | ||||
JP59193361A | ||||
JP460468A | ||||
JP62261986A | ||||
JP63215968A | ||||
JP57203958A | ||||
JP4934371A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)
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