Title:
【発明の名称】ニューロコンピュータの集中制御方式
Document Type and Number:
Japanese Patent JP2677656
Kind Code:
B2
Abstract:
PURPOSE:To exchange data between basic units by the small number of wires and to realize a neural network by transmitting an weight memory address signal. CONSTITUTION:A control pattern memory 12 stores the pattern of a control signal for the neural network and an weight memory 14 stores weight data. A sequencer 13 generates the addresses of the control pattern memory 12 and weight memory 14. A digital control means 15 is an internal processor equipped with an MPU and main memory and is connected through D/A and A/D converters 16 and 17 to a network 18. Then, the neural network 18, control pattern memory 12, sequencer 13 and weight memory 14 are wholly controlled. Thus, the exchange of the data can be realized between the basic units, which constitute the hierarchical network, by the small number of the wires and the neural network can be realized.
Inventors:
Hideki Yoshizawa
Hiroki Ichiki
Hideki Kato
Kazuo Asakawa
Yoshihide Sugiura
Hiroyuki Tsuzuki
Shuichi Endo
Takashi Kawasaki
Toshiharu Matsuda
Hiroshi Iwamoto
Tsuchiya
Katsuya Ishikawa
Hiroki Ichiki
Hideki Kato
Kazuo Asakawa
Yoshihide Sugiura
Hiroyuki Tsuzuki
Shuichi Endo
Takashi Kawasaki
Toshiharu Matsuda
Hiroshi Iwamoto
Tsuchiya
Katsuya Ishikawa
Application Number:
JP4520989A
Publication Date:
November 17, 1997
Filing Date:
February 28, 1989
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06G7/60; G06F15/18; G06N3/02; G06N3/04; G06N99/00; (IPC1-7): G06G7/60
Domestic Patent References:
| JP1237754A |
Attorney, Agent or Firm:
Yoshiyuki Osuge (1 outside)