Title:
【発明の名称】データプロセッサ
Document Type and Number:
Japanese Patent JP2003504767
Kind Code:
A
Abstract:
A data processor which comprises a line of unit cells of alternating type, each capable of adopting two distinguishable states. The states of the cells of each respective type can be transformed (e.g. switched from one state to the other) by respective stimulae (which act on all cells of that type simultaneously) in dependence upon whether the cells two nearest neighbours in the line are both in mutually the same state or in mutually different states. Binary data bits are each represented by a pattern of states of four adjacent cells, and data is loaded onto the cells so that each bit is spaced by four cells from an adjacent bit. Logical operations can be performed on the data by loading a control unit (a particular pattern of states of six adjacent cells) and then applying the stimulae to transform the states of the cells. The processor can be implemented on a conventional computer by implementing the cells as Boolean variables in an array with the stimulae being update rules applied to the array. Alternatively the processor can be implemented as a quantum computer in which the cells are quantum systems (e.g. quantum dots, trapped ions, atomic or molecular spins) which have two eigenstates.
Inventors:
Benjamin, Simon, Charles
Application Number:
JP2001510165A
Publication Date:
February 04, 2003
Filing Date:
July 05, 2000
Export Citation:
Assignee:
ISIS INNOVATION LIMITED
International Classes:
G06G7/12; G06N99/00; (IPC1-7): G06G7/12; G06N1/00
Attorney, Agent or Firm:
Akira Asamura (3 outside)