Title:
【発明の名称】従属同期方式
Document Type and Number:
Japanese Patent JP3010804
Kind Code:
B2
More Like This:
| JPH03286640 | FRAME PULSE DETECTION CIRCUIT |
| JPS6167343 | FRAME SYNCHRONIZING DEVICE |
| WO/2004/001982 | INTERLEAVING OF INFORMATION BITS |
Inventors:
Hideharu Yuasa
Application Number:
JP18366291A
Publication Date:
February 21, 2000
Filing Date:
June 27, 1991
Export Citation:
Assignee:
NEC
International Classes:
H04J3/06; H04L7/00; (IPC1-7): H04J3/06; H04L7/00
Domestic Patent References:
| JP4352535A | ||||
| JP4127631A | ||||
| JP57162552A |
Attorney, Agent or Firm:
Naotaka Ide