Title:
【発明の名称】ディジタル送受信装置
Document Type and Number:
Japanese Patent JP2690405
Kind Code:
B2
Abstract:
PURPOSE:To realize the digital transmitter-receiver with a short polling interval in the polling system transmitter-receiver employing the frequency hopping system. CONSTITUTION:A signal from a main station is mixed with a local signal at a reception circuit 20 via an antenna 18 and a high frequency changeover device 19 and a demodulation circuit 20 demodulates a data. A hopping pattern signal from the main station is subject to synchronization acquisition by a synchronization acquisition circuit 24, and a synchronization hold circuit 25 applies synchronization holding to the signal based thereon to control a hopping pattern generating circuit 23 to control a local signal generating circuit 22. A synchronization holding discrimination circuit 26 checks the synchronization holding state after a prescribed time to control a hopping pattern generating circuit 23 so as to omit the succeeding synchronization holding when the synchronization holding is consecutive. When the synchronization holding state is valid up to a succeeding synchronization holding time, the succeeding synchronization acquisition is omitted and polling is implemented immediately, then the polling interval is reduced.
Inventors:
Masahiko Murakami
Application Number:
JP6525891A
Publication Date:
December 10, 1997
Filing Date:
March 07, 1991
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H04J13/00; H04B1/713; H04L7/00; H04L12/28; H04W24/00; H04W56/00; H04W72/04; H04W74/04; H04W74/06; H04W84/12; (IPC1-7): H04L12/28; H04B1/713; H04L7/00
Domestic Patent References:
| JP2181534A |
Attorney, Agent or Firm:
Hiroaki Tazawa (2 outside)