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Title:
【発明の名称】除算回路
Document Type and Number:
Japanese Patent JP2845695
Kind Code:
B2
Abstract:
PURPOSE:To perform highly precise division with small-scale constitution by measuring the difference in charging time between a 1st and a 2nd RC circuit (timer) by a 3rd timer and employing the final output voltage of the 3rd timer as a division result. CONSTITUTION:An input voltage X is inputted to the timer T1 and an input voltage Y is inputted to the timer T2; and the timer T1 has a threshold element Th1 which generates an output when the voltage exceeds a threshold voltage and a two-input capacitive coupled Cp1 is connected to the input of this TH1. The Cp1 is formed by connecting a couple of capacitances C1 and C2 in parallel. The timer T2 consists of a threshold element Th2, a two-input coupled Cp2, a charging capacitance C6, and a resistance R2 and connected in a configuration corresponding to the Th1, Cp1, C3, and R1. The timer T3 has a charging capacitance C7; and V7 is inputted to one terminal of the C7 and the other terminal is an output terminal Z. Here, the difference in charging time between the timers T1 and T2 is measured by the timer T3 and the final output voltage is regarded as the division result.

Inventors:
KOTOBUKI KOKURYO
YO IKO
UIWATSUTO UONWARAUIPATSUTO
TAKATORI SUNAO
YAMAMOTO MAKOTO
Application Number:
JP30494492A
Publication Date:
January 13, 1999
Filing Date:
October 16, 1992
Export Citation:
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Assignee:
YOZAN KK
SHAAPU KK
International Classes:
G06G7/16; (IPC1-7): G06G7/16
Domestic Patent References:
JP525820B2
Attorney, Agent or Firm:
Yamamoto Makoto



 
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