Title:
【発明の名称】論理回路シミュレーシヨン装置
Document Type and Number:
Japanese Patent JP2894732
Kind Code:
B2
Abstract:
PURPOSE:To facilitate the searching work of the occurring place of an indefinite value occurred in an output signal obtained by the simulation of a logical circuit by seeking after a generating origin automatically as tracing back elements in the logical circuit successively from an output side when the output signal in which the indefinite value exists is designated. CONSTITUTION:The variation information of an input/output signal to be stored in a simulation result holding means B and obtained by the arithmetic operation of a simulation arithmetic means A is displayed as a waveform on a display means C. Then, when an indefinite value signal indicated clearly together with the waveform is designated by an indefinite value signal input means D, an indefinite value signal occurring place seeking means E traces back to the element of the generating origin outputted the designated indefinite value signal, and displays this element together with the input/output signal on the display means C by an indefinite value occurring place display means F. Thus, the searching work of the occurring place of the indefinite value occurred in the output signal obtained by the simulation of the logical circuit is facilitated.
Inventors:
YAMAMOTO TOSHIO
NISHI HIDEAKI
NISHI HIDEAKI
Application Number:
JP21177389A
Publication Date:
May 24, 1999
Filing Date:
August 17, 1989
Export Citation:
Assignee:
RIKOO KK
International Classes:
G06F11/25; G06F11/26; G06F17/50; (IPC1-7): G06F17/50
Domestic Patent References:
| JP1214943A | ||||
| JP240773A |
Attorney, Agent or Firm:
Kei Osawa