Title:
【発明の名称】論理シミュレーション方式
Document Type and Number:
Japanese Patent JP2626218
Kind Code:
B2
Abstract:
PURPOSE:To attain logical simulation in an initial state intended by a designer by allocating an 1-bit flag to each logical element, setting up the flag of the element to '1' at the time of setting up a logical initial state value, and when a change occurs in the output state value of the element at the time of computing the initial value, suppressing the propagation of change information to a connected destination by a state change propagation suppressing means. CONSTITUTION:An 1-bit flag is allocated to each logical element, and at the time of setting up an initial state value obtained immediately before the start of logical simulation on the logical element, the flag is set up to '1' by an initial state value setting identifying means 1. If a change occurs in the output state value of the logical element at the time o initial state simulation 2, the state change propagation suppressing means 3 suppresses the propagation of the change information to a connected destination when the flag is '1'. Thereby, the initial state value can be held and logical simulation can be executed in the initial state intended by the designer.
Inventors:
Tatsuya Minagawa
Application Number:
JP23658490A
Publication Date:
July 02, 1997
Filing Date:
September 06, 1990
Export Citation:
Assignee:
NEC
International Classes:
G06F11/25; G06F11/26; G06F17/50; (IPC1-7): G06F17/50
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)