Title:
【発明の名称】乗算回路
Document Type and Number:
Japanese Patent JP2837080
Kind Code:
B2
Abstract:
A multiplier circuit including a first voltage supply for supplying a first voltage; a second voltage supply for supplying a second voltage; and a control section having a first terminal through which an input current flows, a second terminal through which a current equal to or a constant multiple of the input current at the first terminal flows, the first voltage being supplied to the second terminal, a third terminal through which an output current flows, and a fourth terminal through which a current equal to or a constant multiple of the output current at the third terminal. The second voltage is applied to the fourth terminal. The control section controls the output current so that a logarithm of a ratio of an absolute value of the output current to an absolute value of the input current is in proportion to a difference between the first voltage and the second voltage.
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Inventors:
HATANAKA KAZUTOMI
Application Number:
JP28705093A
Publication Date:
December 14, 1998
Filing Date:
November 16, 1993
Export Citation:
Assignee:
SHAAPU KK
International Classes:
G06G7/16; G06G7/24; (IPC1-7): G06G7/16
Attorney, Agent or Firm:
Shusaku Yamamoto