Title:
【発明の名称】神経回路
Document Type and Number:
Japanese Patent JP3135910
Kind Code:
B2
Abstract:
PURPOSE:To eliminate need for a resistance and a capacitor and to decrease a hardware scale by simulating film potential variation corresponding to an exciting input and a self-controlling input, film potential variation when there is none of the exciting input, the self-controlling input, and a learning signal, and output pulses by specific circuits. CONSTITUTION:The neural circuit is equipped with a 1st memory 101, a 2nd memory 103, an input control circuit 105, an adding circuit part 107, a decision circuit part 109, a bit shift and inverting circuit 111, a time-division control circuit 113, a 1st input terminal 115, a 2nd input terminal 117, an output terminal 119, a 3rd memory 301, a learning control circuit 303, etc. Then the circuit consisting of the 1st and 2nd memories 101 and 103 and adding circuit part 107 has the function that the part of a conventional neural circuit which is composed of a resistance and a capacitor has and many neural units can be simulated. Consequently, LSI-implementation is easier than usual and even when many neural circuits are used, the hardware scale is less than before; and the neural circuit which can easily be given a learning function can be formed.
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Inventors:
Atsushi Shimbo
Teruaki Uehara
Yukio Suzuki
Hiroshi Imai
Teruaki Uehara
Yukio Suzuki
Hiroshi Imai
Application Number:
JP27992790A
Publication Date:
February 19, 2001
Filing Date:
October 18, 1990
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
G06G7/60; G06F15/18; G06N3/04; G06N3/06; G06N99/00; (IPC1-7): G06G7/60; G06N3/04
Attorney, Agent or Firm:
Takashi Ogaki