Title:
【発明の名称】信号処理装置
Document Type and Number:
Japanese Patent JP2573651
Kind Code:
B2
Abstract:
PURPOSE:To facilitate trouble inspection by comparing test data which is sent from a 1st signal processing means to a 2nd signal processing means with data which is reset from the 2nd signal processing means receiving the test data to the 1st signal processing means. CONSTITUTION:For example, if there is the disconnection of wiring between the 1st signal processing means 10 and 2nd signal processing means 20, test mode data is set to 1, a test trigger is set to 0, and the test data is to 0, so that 0 is applied to latch circuits 11d and 21c. Here, when the trigger is set to 1, an output buffer 11b is in a stop state, and the circuit 11b is in a latch state; and the circuit 21c is in a latch state and an output buffer 21d is in a through state. The output 0 of the circuit 11d is applied to one input terminal of an exclusive OR circuit 11f, but the other input is undefined because of the disconnection of wiring. When the test trigger is changed to 1 after the test trigger is set to 0 and the test data is set to 1, one input of the circuit 11f becomes 1, but the other input is undefined and even when both inputs are equal, the test data is 0 or 1, so both inputs do not coincide, so that the output is 1 (abnormal).
Inventors:
GOTO JUICHI
AZUMAI MITSUO
AZUMAI MITSUO
Application Number:
JP9089988A
Publication Date:
January 22, 1997
Filing Date:
April 12, 1988
Export Citation:
Assignee:
KONISHIROKU PHOTO IND
International Classes:
G06F11/22; G01R31/28; (IPC1-7): G06F11/22; G01R31/28; G06F11/22
Domestic Patent References:
| JP62100848A | ||||
| JP62181951A |
Attorney, Agent or Firm:
Fujishima Ijima (1 outside)