Title:
【発明の名称】タイミング信号遅延回路装置
Document Type and Number:
Japanese Patent JP2582250
Kind Code:
B2
Abstract:
PCT No. PCT/JP87/00734 Sec. 371 Date Jan. 15, 1988 Sec. 102(e) Date Jan. 15, 1988 PCT Filed Oct. 2, 1987 PCT Pub. No. WO88/02577 PCT Pub. Date Jul. 4, 1988.Timing-signal delay equipment which provides an adjustable delay time, equal to a multiple of a predetermined time unit, to an input signal pulse is used as a timing source required in a circuit tester of LSIs (semiconductor large-scale integrated circuits). The timing-signal delay equipment has a plurality of delay elements (Dij's) with weighted delay times arranged in a matrix form; a selector (S) coupled with the matrix for selecting one of the delay elements for each column of the matrix, wherein the selected delay elements are connected in series; and an arithmetic control circuit (M) that controls the selectors based on a set-up value of delay time and an error in delay time of each delay equipment. In order to provide a delay time which is equal to a multiple of a predetermined time unit in spite of an error in delay time of each delay element, either a correction matrix is connected in series to the matrix or the weight of each delay element is modified.
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Inventors:
OTSUJI TAIICHI
NARUMI NAOAKI
NARUMI NAOAKI
Application Number:
JP23671686A
Publication Date:
February 19, 1997
Filing Date:
October 03, 1986
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03K5/13; G01R31/319; H03K5/15; H04L7/02; H03K5/00; (IPC1-7): H04L7/02; H03K5/13
Domestic Patent References:
| JP595736A | ||||
| JP61120517A |
Attorney, Agent or Firm:
Shoji Tanaka