Title:
COMPLEMENTARY MOS DEVICE DRIVING CIRCUIT
Document Type and Number:
Japanese Patent JPS5815321
Kind Code:
A
Abstract:
A CMOS integrated circuit which requires a higher and a lower supply voltage source, often includes a parasitic diode commonly in the form of a thyristor which is formed with its anode connected to the lower voltage supply terminal and its cathode to the higher voltage supply terminal. The present invention is an FET which has its source-drain circuit connected between the lower voltage terminal of the integrated circuit and the lower voltage source, and its gate to the higher voltage source. This protects the integrated circuit diode from fusing if either passive or dynamic conditions result in the faster voltage rise at the anode relative to the cathode when supply voltage is applied to the integrated circuit, since the voltage at the anode is protected from rising faster than the cathode.
Inventors:
ANDORIASU DEMITORIYUU
Application Number:
JP17436781A
Publication Date:
January 28, 1983
Filing Date:
October 29, 1981
Export Citation:
Assignee:
MITEL CORP
International Classes:
H03K5/02; G05F1/577; H01L27/02; H01L27/092; H03K5/00; H03K17/08; H03K17/0814; H03K17/16; H03K17/687; H03K19/003; (IPC1-7): H03K5/00; H03K17/22; H03K17/687
Domestic Patent References:
| JPS54148491A | 1979-11-20 |
Attorney, Agent or Firm:
Aoyama