Title:
【発明の名称】ボールグリッドアレイ型半導体装置およびその製造方法ならびに電子装置
Document Type and Number:
Japanese Patent JP3081559
Kind Code:
B2
Abstract:
A ball-grid-array-type semiconductor device comprising a package substrate constituted with a ceramic wiring board having a semiconductor chip mounting portion on the principal plane and electrodes arranged like an array on the back, a semiconductor chip secured to the principal plane of the package substrate, connection means for electrically connecting the electrodes of the semiconductor chip with the wiring of the wiring board, a sealing body provided for the principal plane side of the wiring board and made of an insulating resin to cover the semiconductor chip and the connection means, a pedestal layer made of low-fusion-point solder and formed on the electrodes, and a metallic ball secured onto the pedestal layer; wherein a buffering layer made of high-fusion-point solder which covers the entire surface of the electrodes and whose margin extends up to a predetermined length on the back of the package substrate is formed on the electrodes and the pedestal layer is formed on the buffering layer.
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Inventors:
Kiyoshi Mizushima
Akira Aoki
Satoshi Ikeda
Noriyuki Tanaki
Akira Aoki
Satoshi Ikeda
Noriyuki Tanaki
Application Number:
JP14631497A
Publication Date:
August 28, 2000
Filing Date:
June 04, 1997
Export Citation:
Assignee:
Nikko Co., Ltd.
International Classes:
H01L21/60; H01L23/12; H01L23/31; H01L23/498; H05K3/34; (IPC1-7): H01L23/12
Domestic Patent References:
| JP9134934A | ||||
| JP10116927A | ||||
| JP9270477A | ||||
| JP5508736A |
Attorney, Agent or Firm:
Shuuki Akita