PURPOSE: To start the operation of a recharging circuit on the completion of the charging and discharging of a reduced capacitor by providing a circuit which includes a switching element and a capacitor which are reduced at the same ratio of the gate width of the switching element and capacity value of wiring capacity of input/output lines in an input buffer.
CONSTITUTION: When data is read out of one optional memory cell and the opposite data is written in the same memory cell, input and output lines 6 and 7 have relatively large wiring capacities C1 and C2, so potential variations of the input and output lines do not follow up variations in potential of input lines 8 and 9 in writing operaion and it is hard to determine the timing for bumping the potential of the input/output line 7. For the purpose, the circuit obtained by reducing the capacity values of wiring capacities C1 and C2 and the gate widths of MOSTs Q1 and Q2 at the same ratios is provided to the input buffer 1, and the charge of one of the reduced capacitors C3 and C4 is discharged through the switching element of one of MOSTs Q6 and Q11, and a timing signal for starting the operation of the recharging circuit 5 is generated after the charging to prevent wrong data from being written in a memory cell.
SHIMOTORI KAZUHIRO
FUJISHIMA KAZUYASU
MIYATAKE HIDEJI
OZAKI HIDEYUKI
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