Title:
【発明の名称】集積2乗回路の改善
Document Type and Number:
Japanese Patent JPS61500942
Kind Code:
A
Abstract:
An integrated circuit for squaring an original input signal includes a pair of dual-ended difference amplifiers to each of which the input signal is delivered, a pair of dual-to-single-ended converters, each receiving the respective dual-ended output of the respective difference amplifier, and a summing network for summing the squares of the outputs of the dual-to-single-ended converters. One of the dual-to-single-ended converters receives the dual-ended output of the corresponding dual-ended amplifier in opposite (cross-coupled) order from that of the other, whereby the output of the summing network is, except for an additive constant, proportional to the square of the original input signal independently of power supply voltage fluctuations within reasonable limits.
Inventors:
Stephen J. Joseph
Application Number:
JP50011285A
Publication Date:
May 08, 1986
Filing Date:
December 06, 1984
Export Citation:
Assignee:
American Telefon and Telegraph Kampani-
International Classes:
G06G7/20; H03B19/14; (IPC1-7): H03B19/14; G06G7/20
Attorney, Agent or Firm:
Masao Okabe