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Patent Searching and Data


Title:
SOLID STATE IMAGE PICKUP ELEMENT
Document Type and Number:
Japanese Patent JPS589362
Kind Code:
A
Abstract:

PURPOSE: To realize a wider dynamic range by a method wherein a buried layer whose impurity concentration is higher than the surrounding regions is provided in the substrate side of a solid state image pickup element constitutng photodiode junction surface and connection is estabilished only in one direction to provide a larger diode junction capacity resulting in an increase in saturation signal.

CONSTITUTION: A P type layer 42 is diffusedly formed on the surface of an N type semiconductor substrate 41 wherein MOS transistor souce and drain forming regions 43 and 44 are provided. The part of the layer 42 exposed therebetween is covered with a gate insulating film 45 and then provided with a gate electrode 46. Next, an element isolating oxide film 49 is provided in contact with a region 44 for the division of the entirety into individual photoelectron conversion elements. The entire surface is then covered with an interlayer insulating film 48, openings are provided, and vertical signal lines 50 are attached, each of which is connected common to the elements in each of the rows. In tis construction, under the region 43, a P+ type buried layer 47 whose impurity concentration is higher than that of the layer 42 is formed. A layer 47 is provided for each conversion element and is serially interconnected. This prevents generation of bright and dark stripes in the picture.


Inventors:
NAGANO TOYOKAZU
IMAI KAZUNORI
MITOMI YOSHINORI
NAGAI SHINICHI
CHIBA TOSHIYUKI
Application Number:
JP10558381A
Publication Date:
January 19, 1983
Filing Date:
July 08, 1981
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/146; H04N5/335; H04N5/355; H04N5/359; H04N5/374; (IPC1-7): H01L27/14
Attorney, Agent or Firm:
Katsuo Ogawa