Title:
【発明の名称】半導体集積回路のシミュレーション方法
Document Type and Number:
Japanese Patent JP2863239
Kind Code:
B2
Abstract:
PURPOSE:To realize the promotion of the efficiency of simulation by multiplying every partial circuit by the scale factor variable of an optional value. CONSTITUTION:A simulation device 10 is constituted by being provided with a scale factor setting part 11 and a simulation part 12, and the partial circuit data 13 of every partial circuit 1 to 4 is inputted to the scale factor setting part 11. Then, every partial circuit 1 to 4 is multiplied by the scale factor variable P of the optional value. Thus, the element constants of all basic elements to constitute the partial circuits 1 to 4 are changed, and an electric characteristic similar to the electric characteristic in the case the partial circuits 1 to 4 are connected in parallel is obtained, and the efficiency of the simulation of a semiconductor integrated circuit is promoted.
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Inventors:
WAKAO MASATO
Application Number:
JP784590A
Publication Date:
March 03, 1999
Filing Date:
January 17, 1990
Export Citation:
Assignee:
FUJITSU KK
FUJITSU UI ERU ESU AI KK
FUJITSU UI ERU ESU AI KK
International Classes:
G06F17/50; G01R31/28; G06G7/62; H01L21/66; (IPC1-7): G06F17/50
Domestic Patent References:
| JP250263A | ||||
| JP2268342A |
Attorney, Agent or Firm:
Hironobu Onda