Title:
【発明の名称】不揮発性メモリを備える半導体装置
Document Type and Number:
Japanese Patent JP2003501838
Kind Code:
A
Abstract:
The invention relates to a semiconductor device with a semiconductor body which is provided at a surface with a programmable and electrically erasable non-volatile memory comprising a matrix of memory cells which each comprise a field effect transistor with floating gate. A device according to the invention is characterized in that each memory cell comprises a select transistor T2 which is connected in series with the floating gate transistor T1, in that the memory cells form a matrix of the NOR type, and in that the select transistor is connected to the source of the floating-gate transistor, while both writing and erasing are carried out on the basis of the Fowler-Nordheim tunneling mechanism.
Inventors:
Tao Guokiao
Velhard robertus deejay
Dolmans Guid JM
Kuppens Roger
De Graaff Caroline
Velhard robertus deejay
Dolmans Guid JM
Kuppens Roger
De Graaff Caroline
Application Number:
JP2001502170A
Publication Date:
January 14, 2003
Filing Date:
May 24, 2000
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G11C16/04; H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; G11C16/04; H01L27/115; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Susumu Tsugaru (1 person outside)