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Title:
MANUFACTURE OF SEMICODUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5848968
Kind Code:
A
Abstract:

PURPOSE: To simplify a manufacturing process by a method wherein a Schottky- gate electrode made of a high-melting point metallic silicide is formed onto a semi-insulating compound semiconductor substrate, impurity atoms are implanted while using the electrode as a mask, and source and drain regions are shaped while an impurity is also spread in the lateral direction and a channel region is obtained.

CONSTITUTION: An SiO2 film 10, an FET forming region thereof has a window, is formed onto the semi-insulating substrate 1 to which Cr is doped, and the gate electrode 11 consisting of (0.3Ti, 0.7W)Si2 is shaped into the window. The n type impurity ions are implanted while using the film 10 and the electrode 11 as the masks, and the n+ type source region 12 and the n+ type drain 13 are formed through heat treatment for approximately fifteen min at 850°C while ions are also spread in the lateral direction and the n type channel region 14 is shaped to the substrate 1 positioned under the electrode 11 between the regions 12, 13. ELectrodes 14, 15 are each attached to the regions 12, 13 through a normal method, and the FET, transfer conductance per 1mm gate width thereof is 120mS, is obtained.


Inventors:
YOKOYAMA NAOKI
Application Number:
JP14808381A
Publication Date:
March 23, 1983
Filing Date:
September 18, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/265; H01L21/338; H01L29/80; H01L29/812; (IPC1-7): H01L21/265
Domestic Patent References:
JPS5310265A1978-01-30
JPS4953780A1974-05-24
JPS5655074A1981-05-15
JPS499914A1974-01-29
Attorney, Agent or Firm:
Koshiro Matsuoka



 
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