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Title:
DIAGNOSTIC SYSTEM OF COMPUTER
Document Type and Number:
Japanese Patent JPS5933561
Kind Code:
A
Abstract:

PURPOSE: To attain ease of troubleshooting, by diagnosing the system in parallel with the instruction execution and storing the result.

CONSTITUTION: The inversion of ON/OFF of optional signals N0, N1WNn considered necessary for the diagnosis of failure from a logical circuit 1 is detected at a detecting circuit 4. The detected inverted signals DN0, DN1WDNn count inversion detecting counters 5, 6. The counted CN0, CN1WCNn and C2N0, C2N1W C2Nn are set to a signal recording register 7. On the other hand, the number of inverted times is set from a signal comparison information memory 11 recorded in advance to a comparison information register 9. Further, a comparison circuit 8 compares the information in the register 7 and that in the register 9. The compared information is discriminated at a discriminating circuit 13 and when they are dissident, the information of the counter 6 is recorded in a memory 15. Thus, the signal information considered to be a failure is recorded.


Inventors:
IIJIMA YOUICHI
Application Number:
JP14411682A
Publication Date:
February 23, 1984
Filing Date:
August 20, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/22; G06F11/07; G06F11/30; (IPC1-7): G06F11/34
Domestic Patent References:
JPS5147509A1976-04-23
JPS5449040A1979-04-18
Attorney, Agent or Firm:
Sadaichi Igita