PURPOSE: To satisfy both the withstanding voltage of a linear transistor and the current amplification factor of I2L, by selectively oxidizing an Si substrate, and making the substrate at an I2L part thin.
CONSTITUTION: N layers 12 are embedded in a linear transistor forming part A and an I2L forming part B of a P type Si substrate 11, respectively, and an N epitaxial layer 13 is laminated. The region A is coated by an Si3N4 mask 15 on a thermal oxide film 14. An SiO2 thick film 16 is provided by high pressure thermal oxidation. The mask 15 and the films 14 and 16 are removed by dry etching. Then insulating separation is provided by a P layer 17. N layers 18 are connected to the embedded layer. P layers 19 and N layers 20 are formed by selective diffusion, and Al wirings are provided. Thus both the linear transistor and the I2L are provided on the same substrate. In this constitution, a distance lA between the P layer 19 and the N embedded layer 12 is large in the part A, and a distance lB in the part B is small. The withstanding voltage of the linear transistor is made large. In the I2L, the emitter efficiency of a transistor, wherein the P layer 19 acts as a base, is improved, the current amplification factor of said transistor is increased, and the operating speed is improved.
JPS60249425 | INTERFACE CIRCUIT OF I2L SEMICONDUCTOR INTEGRATED CIRCUIT |
JPS63202959 | SEMICONDUCTOR DEVICE |
JP55063838B | ||||
JPS5532025A | 1980-03-06 |