PURPOSE: To reduce the number of steps of sampling and holding circuits and to reduce circuit size, power consumption and random noise by dividing n small capacity memories into two groups and executing writing and reading alternately.
CONSTITUTION: Inputs of holding circuits 1-1W1-n in a serial/parallel conversion part are connected to an analog signal input terminal 3 through sampling circuits 2-1W2-n and the outputs of respective holding circuits 1-1W1-n are inputted to parallel memory circuits 9-1W9-n through switches 6-1W6-n. Respective sampling circuits 2-1W2-n supply an input signal to the holding circuits 1-1W1-n by sampling pulses 1SWnS on the basis of sampling signals 5-1W5-n from a control circuit 4. The parallel memory part is divided into two small capacity memory groups 9-1W9-l and 9-(l+1)W9-n and writing and reading in/from these memories are controlled so as not to be superposed each other.
MATSUI KAZUMASA
FUKAZAWA SHIGERU
