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Title:
FLOATING THRESHOLD SIGNAL CIRCUIT
Document Type and Number:
Japanese Patent JPS60163530
Kind Code:
A
Abstract:

PURPOSE: To make a minute pattern on the entire region of a linear sensor binary by using a gain bias control signal obtain by giving a specific time delay to an analog video signal subjected to sample-and-hold at a prescribed period as a threshold value.

CONSTITUTION: A floating threshold signal 8 is generated by amplifying an analog video signal 5 outputted from a CCD linear sensor 1 by an amplifier circuit 2 through a video signal delay circuit 3 and a gain bias control circuit 4. The circuit 3 consists of a sampling signal generating circuit 3-1 and sample-and- hold circuits 3-2∼3-4. The circuit 3-1 generates a sampling signal S1 of a period T and a signal 7-1 is generated from an output signal 6 of the circuit 2 by the circuit 3-2. The signal 7-2 is generated with a signal S2 delayed by a time T' (T/2<T'<T) from the signal S1, and a signal 7-3 is generated by a signal S3 delayed by the time T' further. The signal 7-3 is fed to the circuit 4 and the minute pattern of the entire region of the sensor 1 is binary-coded by using the signal 8 as a threshold value.


Inventors:
UCHIUMI KOUJI
Application Number:
JP1770984A
Publication Date:
August 26, 1985
Filing Date:
February 03, 1984
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04N1/403; G03F1/00; H03K5/08; H04N1/40; (IPC1-7): G03F1/00; H03K5/08; H04N1/40
Domestic Patent References:
JPS52115641A1977-09-28
Attorney, Agent or Firm:
Uchihara Shin



 
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