PURPOSE: To improve the degree of integration of an integrated circuit device by forming a through-hole in a self-alignment manner without depending upon the accuracy of superposition of a mask and extracting an electrode.
CONSTITUTION: A pattern of a silicon dioxide film 9, a polycrystalline silicon film 4 and a gate oxide film 3 is formed. Source-drain regions 5 are formed. A silicon nitride film 10 and a polycrystalline silicon film 11 are deposited. The polycrystalline silicon 11 is left only on the side surface of a stepped difference through anisotropic etching. When the polycrystalline silicon 11 is changed into a silicon dioxide film 12 through oxidation and the silicon nitride film 10 is removed, the source-drain regions 5 are exposed. A second layer polycrystalline silicon film 7 is deposited on the regions 5, phosphorus is doped, a pattern is formed, and electrodes in the regions 5 are extracted by the second layer polycrystalline silicon film. The pattern is insulated and isolated from the polycrystalline silicon electrode by a side surface and from a lower section by the silicon dioxide film through the silicon nitride film and the silicon dioxide film. Accordingly, a through-hole can be formed in a self-alignment manner.
JPS5830161A | 1983-02-22 |