Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6139115
Kind Code:
A
Abstract:
PURPOSE:To attain high-accuracy biasing by providing a stabilized voltage circuit and an output voltage adjusting circuit on a substrate, and biasing a well area by using an output voltage after adjustment. CONSTITUTION:The stabilize voltage circuit 21 is connected to the output voltage adjusting circuit 23 on the substrate. The output of its stabilized voltage is supplied to the input terminal 25 through a line 24 and the output of the circuit 25 is outputted to a bias terminal 27 through a line 26. The circuit 25 obtains a necessary gain by using an in-phase output form when the polarity of the adjustment output of the stabilized voltage is coincident with that of the well area to be biased. When not, a necessary gain is obtained by using an opposite-phase output form. Then, the output voltage is adjusted by the circuits 21 and 23 and applied to the input of the circuit 25 to attain high-precision biasing with the output at the bias terminal 27.
Inventors:
OGASAWARA KAZUO
SHIBATA TORU
SHIBATA TORU
Application Number:
JP16034384A
Publication Date:
February 25, 1986
Filing Date:
July 31, 1984
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L27/092; G05F3/20; G05F3/24; H01L21/8238; (IPC1-7): G05F1/565; H01L27/08
Attorney, Agent or Firm:
Yutaro Kumagai