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Title:
ADAPTIVE EQUALIZER
Document Type and Number:
Japanese Patent JPS6118211
Kind Code:
A
Abstract:

PURPOSE: To obtain an equalized output without interference by forming approximately an interference signal component and subtracting it from an input signal.

CONSTITUTION: A received signal at a terminal 1 is formed into an equalized output signal without interference by subtracting a signal formed approximately from an interference signal waveform outputted from an adder circuit 8 at a subtraction circuit 3, correct data identification/discrimination is conducted at the identification circuit 4 of the next stage and the result is outputted from a terminal 5 as a reception data signal pulse. Further weights w1∼wM are multiplied respectively at each multiplier circuit 7 to a passing signal from each stage through one stage of a delay circuit 6 having a delay time of data identification period T and the (M-1)th stage of a delay circuit 9 having a delay time of T/2 to the pulse from the circuit 4 and signals passing respectively through a sampling function signal forming circuit 10 are added by a circuit 8 to obtain a signal forming approximately the interference signal waveform.


Inventors:
ONO SHIGERU
Application Number:
JP13708284A
Publication Date:
January 27, 1986
Filing Date:
July 04, 1984
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H03H15/00; H04B3/04; (IPC1-7): H03H15/00
Domestic Patent References:
JPS5888914A1983-05-27
Attorney, Agent or Firm:
Toshiaki Suzuki



 
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