PURPOSE: To vary a hysteresis width, by changing the control level of a source potential or a reference potential, through the use of either of an output signal or an input signal to an input circuit and a control signal.

CONSTITUTION: When a control signal C1 is at a high level, in the operation in which the input level changes from low to high level, FETs Q1, Q2 are turned off since input level is at first at a low level and Q3, Q5 turn on and an output O1 goes to the high level. When the input level exceeds a VT1, although the FETQ1 turns on, since FETs Q3, Q4 and Q5 are turned on, a potential at a point A is a value split with a resistance at the FETQ1 turned on and a synthesized resistance resistor at the FETsQ3, Q4 and Q5 turned on. Since this value is smaller than the value when the synthesized resistance of the FETsQ3, Q4 and Q5 is only with that of the FETQ3, a control signal is higher than the low level. The hysteresis width can be changed with the level of the control signal C1.