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Title:
PULSE SIGNAL MULTIPLYING DEVICE
Document Type and Number:
Japanese Patent JPH04104508
Kind Code:
A
Abstract:

PURPOSE: To use a conventional CPU, a low-cost CPU, or parts equivalent to a CPU to obtain an inexpensive pulse signal multiplying device with a simple constitution by generating the same number of false pulses as a prescribed multiplier at time intervals based on the quotient obtained by dividing the just preceding pulse signal section by the prescribed multiplier.

CONSTITUTION: An arithmetic means to divide the time difference between an input pulse signal and the just preceding pulse signal by a prescribed multiplier and a false pulse signal generating means to generate the same number of false pulses as the multiplier at time intervals based on the quotient obtained by this arithmetic means are provided. In this case, a radar antenna 1 is rotated by rotation of a motor 5, and a pulse signal (a) is outputted from a photo encoder 6 and is inputted to a multiplying circuit 7. In this circuit 7, a CPU 71 generates the same number of false pulse signal (b) as the prescribed multiplier in each section of the input signal (a) by program control. Thus, a conventional CPU, a low-cost CPU, or parts equivalent to a CPU are used to obtain the inexpensive pulse signal multiplying device with the simple constitution.


Inventors:
SAITO KOICHI
YANO OSAMU
Application Number:
JP22111990A
Publication Date:
April 07, 1992
Filing Date:
August 24, 1990
Export Citation:
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Assignee:
JAPAN RADIO CO LTD
International Classes:
G01D5/245; G01D5/244; G01S7/03; H03K5/00; (IPC1-7): G01D5/245; G01S7/03; H03K5/00
Attorney, Agent or Firm:
Yuji Takahashi (1 person outside)



 
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