Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6083375
Kind Code:
A
Abstract:

PURPOSE: To improve the capacity of a memory as well as to make its manufacture easier by a method wherein a nitride layer is formed of a silicon nitride layer by means of plasma CVD process while a memory is written in and erased off by means of loading and unloading charge from a gate electrode side.

CONSTITUTION: An oxide insulating layer 16 is formed on a P type silicon substrate 11 and then SiO2 oxide layers 13 and 23 are further formed. A channel stopper region 18 is formed by means of doping an impurity with conductive type similar to that of the substrate 11 at high concentration. The gas of SiH and NH3 are formed into a silicon nitride layer 14 on overall surface of the substrate 11 within plasma by means of plasma CVD process to be etched on a gate insulating layer 23. Besides, a gate electrode 15 is coated and formed on the silicon nitride layer 14 and another gate electrode 25 is formed of polycrystalline silicon layer on the oxide layer 23. The silicon nitride layer 14 is etched utilizing the gate electrode 15 as a mask. Finally source regions 12s, 22s and drain regions 12d, 22d may be formed on the substrate 11 by means of ion implanting process.


Inventors:
KOBAYASHI KAZUYOSHI
Application Number:
JP19144883A
Publication Date:
May 11, 1985
Filing Date:
October 13, 1983
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SONY CORP
International Classes:
H01L21/8247; H01L29/788; H01L29/792; (IPC1-7): H01L29/78
Attorney, Agent or Firm:
Sada Ito



 
Previous Patent: Reducing agent addition device

Next Patent: JPS6083376