PURPOSE: To make the threshold voltage bringing a signal to an MOS level stable to the dispersion in a process and the fluctuation of a power supply voltage, by designating an input signal having TTL level inputted as a reference potential, in an MOS transistor (TR) circuit.

CONSTITUTION: Since an input signal entered to a node 6 has a TTL level, the difference between High and Low levels is small, and the difference between said TTL level and a reference potential given to a node 7 is not taken much, when the potential at the node 1 or 2 too high, even if the input signal is changed, the circuit is hardly inverted. Thus, the circuit is brought easily to be inverted in response to the change in the input signal, by using enhancement ETRs Q7, Q8 and suppressing the potential at the nodes 1, 2 to (VDD-VT) or less. Although a signal locked in phase with a signal of an input terminal is outputted to a node 5, a signal having a phase opposite to the input signal is obtained by replacing signals connected to the gate of an ETRQ9 and a depletion TRQ10. The level of signal is converted into that of the MOS by comparing the input signal of the TTL level with the reference potential, allowing to obtain the stable threshold voltage.