PURPOSE: To control reading and writing operations to execute them at the same timing, by constituting a general register of a data processor of two memories.

CONSTITUTION: At the timing 1, the data processing circuit sends an address to be read out from a memory 1 as the operand 1 of an instruction A to an address register 3 through a multiplexer 9 under control of a control part 17. The address sent to the register 3 is sent to multiplexers 12, 15, 16 under control of a control part 13 and simultaneously sent and stored to/in an address save register 6. The address sent to the multiplexers 15, 16 is sent to the memory 1 through the multiplexer 15. Receiving the specification of the address, the memory 1 reads out the operand 1 of the instruction A, which is sent to an operation processing part 19 through a multiplexer 18.