Title:
MANUFACTURE OF COMPOUND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5821822
Kind Code:
A
Abstract:
PURPOSE:To reduce adverse effects of a lattice defect, by a method wherein a protection film is previously formed in the portion on a compound semiconductor substrate where no electrode ohmic contact is required to be formed thereby to localize a denatured layer formed by the subsequent heat treatment. CONSTITUTION:On an n type GaP single crystal substrate 11, an n type GaP epitaxial layer 121 and a p type GaP epitaxial layer 122 are successively grown to produce a compound semiconductor substrate. Then, an Si3N4 film 13 is formed by the CVD method. Subsequently, the portions of the film 13 corresponding to the portions where ohmic contacts are to be formed are removed by etching to form openings 14. Then, an AuBe film 151 is formed on the whole surface of the film 122, and an AuGe film 152 is formed on the rear surface of the substrate 11, then, the substrate 11 is heat-treated. In this heat treatment process, a denatured layer 18 is localized at only the electrode ohmic contact portions, thereby to make it possible to prevent the adverse effects of a lattice defect on the p-n junction in the portions other than the ohmic contact portions of the layer 122.
Inventors:
IIZUKA YOSHIO
Application Number:
JP12158781A
Publication Date:
February 08, 1983
Filing Date:
August 03, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L21/28; H01L21/318; H01L33/30; H01L33/40; (IPC1-7): H01L21/28; H01L33/00
Attorney, Agent or Firm:
Takehiko Suzue