PURPOSE: To obtain a desired threshold voltage without reducing the width of an electrode, when a contact holes corresponding to a source and drain regions are provided in the MIS type semiconductor device, by providing a polycrystal Si layer on the side surface of a gate electrode which is located between said contact holes through an SiO2 film.

CONSTITUTION: A thick field oxide film 3 is provided on the peripheral part of a P type Si substrate 1, with a P+ type region 2 for channel cutting as a base. A thin gate SiO2 film 4 is deposited on the substrate 1. Then, a gate electrode 6 comprising N+ type polycrystal Si is formed at the central part of the SiO2 film 4 and coated by an SiO2 film 5. N type impurity ions are implanted in the substrate 1 on both sides of the electrode, heat treatment is performed, and the N+ type source and drain regions 8 and 9 are formed. Thereafter an SiO2 film 10 and an undoped polycrystal Si layer 11 are provided on the entire surface. Etching is performed, and the film 10' comprising the film 10 and the layer 11' comprising the layer 11 are left at the side surfaces of the film 5 and the electrode 6. At the same time, the contact holes 12 are provided on the regions 8 and 9. In this method, the width of the electrode 6 is not reduced during the process.