PURPOSE: To resolve an inevitable defect of software processing requiring a long time for data transmission/reception by executing data transmission/reception between a memory in a central processing unit and a memory in a local processing unit through hardware processing.
CONSTITUTION: An output of a command register 1 is transferred to a control circuit 6 and both the units 1, 6 constitute a continuous access control circuit. An address line 7 from a central processing unit (CPU) is also connected to the control circuit 6. A signal line 8 is connected from the circuit 6 to a counter 3 and set-up timing signals 14, 15, 16 from respective registers are transferred from the circuit 6 to a start address register 1, a counter 2 and the couter 3 respectively. A line 10 is connected from the circuit 6 to an address switching gate circuit 9 and a line 12 is connected from the circuit 6 to a memory of a processing unit, e.g. a read-out/write indication terminal (R/W) of a picture memory 11 in a display device.
| JPS58151629 | FLOPPY DISK INTERFACE CIRCUIT |
| JPH07120327 | [Title of Invention] Data Transfer Method |
| JPH08249267 | DMA CONTROLLER |
ANDOU MUNETOSHI
SAKAKI KENJI
MATSUO MIKITA
