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Title:
TRANSISTOR CIRCUIT FOR CLAMPING OUTPUT VOLTAGE
Document Type and Number:
Japanese Patent JPH04233323
Kind Code:
A
Abstract:
PURPOSE: To generate a stable clamp reference voltage for an open collector circuit part of a TTL constitution by using a diode resistance network. CONSTITUTION: Emitters 13 and 18 of two transistors TRs 10 and 15 are connected in common, and a voltage by which an output line 14 should be clamped is directly related to the saturation voltage of a second TR 15 and the base voltage of a first TR 10. When the second TR 15 reaches the saturation state, it settles a fixed current passing a first resistance 20 and a third resistance 21, and this current sets the reference voltage in a current source 19. This reference voltage is converted by a diode 23 and appears the clamp voltage in an output line 14 to prevent an open collector output TR 10 from going to the saturation state. Thus, the voltage by which the output line is clamped is made independent of a driving current.

Inventors:
KURISUCHIYAN JIYON GEECHIERU
Application Number:
JP11219891A
Publication Date:
August 21, 1992
Filing Date:
April 18, 1991
Export Citation:
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Assignee:
IBM
International Classes:
H03K17/04; H03K17/0422; H03K19/013; H03K19/088; (IPC1-7): H03K17/04; H03K19/088
Domestic Patent References:
JPS61224727A1986-10-06
JP45019932A
JPS5123142A1976-02-24
Attorney, Agent or Firm:
Koichi Tonmiya (3 outside)