PURPOSE: To realize miniaturization and low cost without incurring the increase in the hardware even if the number of channels of a transmission data to be protected is increased by not using an n-notation counter but using a random access memory to store the state transition.
CONSTITUTION: In a state transition control circuit 2, the old output state and the old count read synchronously with a timing T1 of a gate circuit 1 are fed from a relevant address of a RAM 3 in advance. In this case, the sampling of the input data and the said old output state are compared. Thus, only when the sampling of an input transmission data takes the same value for n-time consecutively, the level of the output is transited and the output value is outputted without any change in other cases. Thus, the transmission data of a binary level is protected effectively from the disturbance such as noise.
NAKAYAMA AKIHIKO
NIPPON DENKI TSUSHIN SYST KK