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Title:
TRANSMITTING CIRCUIT
Document Type and Number:
Japanese Patent JPH0258932
Kind Code:
A
Abstract:

PURPOSE: To eliminate the need for a buffering circuit in multistage by providing a voltage offset circuit to apply a voltage offset to a VCO so as to compensate the oscillation frequency of the VCO fluctuated with the turn-on/off of an amplifying circuit.

CONSTITUTION: By the impedance fluctuation of an amplifying circuit 10 generated with the on/off control of a carrier, the oscillation frequency of a voltage controlled oscillator(VCO) 4 is influenced, and the oscillation frequency is fluctuated. However, since the output of a voltage offset circuit 13 is outputted by adjusting the offset quantity of a power voltage so as to have a frequency deviation inverted to a direction deviated with the influence by the amplifying circuit 10 to the VCO 4 at the same time, the fluctuation of the oscillation frequency at the VCO 4 is offset, and the stable oscillation frequency can be obtained. Thus, the buffering circuit in multistage does not need to be provided, and a circuit can to be a low energy consumption and to have a small packaging space can be composed.


Inventors:
OTA KIYOSHI
Application Number:
JP20949388A
Publication Date:
February 28, 1990
Filing Date:
August 25, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04J3/00; H03L7/08; H04B1/04; (IPC1-7): H04B1/04; H04J3/00
Attorney, Agent or Firm:
Tan Ashida (2 outside)



 
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