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Title:
TWO-DIMENSIONAL MULTI-AXES NOISE REDUCTION CIRCUIT
Document Type and Number:
Japanese Patent JPH04117076
Kind Code:
A
Abstract:

PURPOSE: To improve picture quality on a display screen by once emphasizing the frequency of a high frequency range signal in the horizontal, vertical, and diagonal directions of a video signal in a recording system emphasis circuit and restoring a signal waveform in a de-emphasis circuit processing the video signal in the horizontal, vertical and diagonal directions.

CONSTITUTION: A noise reduction circuit in the horizontal direction is formed by a first circuit 11 provided with a limiter 11(c) for limiting at a prescribed level the output of a high-pass filter which extracts the frequency in the high frequency range of the video signal. A second circuit 12 detecting the correlation in the vertical direction of the video signal and performing noise reduction in the vertical direction, and third circuits 13 and 14 detecting correlation in the diagonal direction of the video signal and performing the noise reduction in the diagonal direction are provided. Furthermore, the video signal is emphasized on the recording side 10 and then de-emphasized on the reproduction side 20. Thus, noise remaining in the horizontal and vertical directions of the video signal as well as that remaining at the edge in the diagonal direction of the video signal can be effectively eliminated.


Inventors:
SAKAMOTO ETSURO
TAKASHIMA MASATOSHI
Application Number:
JP16850790A
Publication Date:
April 17, 1992
Filing Date:
June 28, 1990
Export Citation:
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Assignee:
SONY CORP
International Classes:
H04N5/21; G11B20/02; (IPC1-7): G11B20/02; H04N5/21
Attorney, Agent or Firm:
Akio Waki



 
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