Title:
VARIABLE LENGTH ENCODER/DECODER
Document Type and Number:
Japanese Patent JP3229690
Kind Code:
B2
Abstract:
PURPOSE: To keep constant or shorten the mean processing time by fetching a bit string by bit length found by a decoding means from an input bit string, and updating the content of the bit string.
CONSTITUTION: The input bit string sent to a variable encoder/decoder is controlled so as to load the maximum bit length of a variable length code on a shift register 2 at a counter circuit 1. The content loaded on the register 2 is stored in an index ROE 3, and an index in accordance with the output of the register 2 is outputted from the ROM 3. The index is sent to a ROM 4 for decoding, and corresponding symbol and bit length are read out, which forms decoder output. Also, the bit length is sent to the circuit 1, and such control that the content of the register 2 can be updated by a prescribed bits is performed. Processing for the next variable length code is performed based on the update content of the register 2, and the input bit string can be decoded by repeating such processing. Thereby, it is possible to shorten mean decoding processing time per symbol and to keep the processing time constant.
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Inventors:
Mitsutaka Komoike
Katsunori Hirase
Katsunori Hirase
Application Number:
JP2363893A
Publication Date:
November 19, 2001
Filing Date:
January 18, 1993
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
H03M7/42; (IPC1-7): H03M7/42
Domestic Patent References:
| JP1235422A | ||||
| JP410716A | ||||
| JP3284019A |
Attorney, Agent or Firm:
Hideyuki Kayama
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