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Title:
VELOCITY SIGNAL CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JPS5753665
Kind Code:
A
Abstract:

PURPOSE: To convert a velocity signal into a digital or analog value, by using a frequency-to-digital converting circuit which has an arithmetic value at any time with a specified time constant by counting with an input signal.

CONSTITUTION: An input pulse signal having a pulse rate H (Hpps) is differentiated by a differentiating circuit 11, whose output is sampled with input pulses Fpps from a timing generating circuit 14, and sampled values are supplied to a comparator 12. Its output is supplied to an up/down counter 13. When the pulse Fpps is inputted, on the other hand, a multiplier 15 generates a pulse proportional to the counted value of the counter 13 and supplies it to the comparator 12. As a result of this comparison, the value of the counter 13 is increased or decreased. Thus, the comparator 12, counter 13 and multiplier 15 forms a closed loop, so arithmetic is performed with a specified time constant. Therefore, a digital signal S4 is obtained from the counter 13, and an analog signal S3 from the multiplier 15.


Inventors:
NAGATA YOSHISHIGE
Application Number:
JP12981180A
Publication Date:
March 30, 1982
Filing Date:
September 17, 1980
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G01P3/489; (IPC1-7): G01P3/489



 
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