PURPOSE: To prevent a distortion of picture due to the jitter which is generated at a VTR input time, by using the sampling clock, which is outputted from a counter incorporated in a PLL circuit, as a horizontal synchronizing signal for picture processing.

CONSTITUTION: A sampling clock CLK outputted from a counter 24 incorporated in a PLL circuit 20 and a horizontal synchronizing signal H-SYNC' for picture processing (phase comparison signal) are used for the write to a picture memory 18 and are synchronized completely with each other independently of disturbance of synchronization of a video signal VIEDEO in distinction from the relation between the clock CLK and a horizontal synchronizing signal H-SYNC separated from a synchronizing signal separating circuit 12. Consequently, the distortion of pictures due to the jitter for video input from a VTR, laws of a tape (picture recording medium), or the like is prevented in this device in distinction from a device where the horizontal synchronizing signal H-SYNC is used as the horizontal synchronizing signal for picture processing as it is.