PURPOSE: To supply a virtual storage computer system which can improve operation speed by means of reducing the frequency of address conversion from a virtual memory to a real memory.

CONSTITUTION: A processor 11 accesses the virtual address of a corresponding global frame on the virtual memory 17 at the time of executing a program module stored in a main storage device 13. A map table 19 is referred to as to initial access by a certain program module so as to obtain a real address concerned on the real memory 18. The real address obtained at that time is stored in a cache register 14. The map table 19 is not successively referred to as to second and succeeding accesses but the target real address is directly calculated based on the real address which is cached, whereby the real memory 18 is accessed.