To realize a voltage source circuit capable of setting an output terminal laid in off state to a ground potential while minimizing the inflow current from the output terminal.

When CONT signal is in high level, an OP amplifier 1 is laid in a non-operating (off) state, where the gate voltage of a PMOS transistor 3 is raised to VDD and fixed. Therefore, the PMOS transistor is turned off. The gate and source of a PMOS transistor 15 are connected to a power source terminal 5, and a drain is connected to a current mirror circuit 10 comprising an NMOS transistor 11 and an NMOS transistor 12 through an NMOS transistor 13. The drain of the NMOS transistor 12 that is the output of the current mirror circuit 10 is connected to the output terminal 4 through the NMOS transistor 14.