PURPOSE: To suppress the undershoot of a reproducing waveform by constituting the titled equalizer so that a reflection factor is adjusted by a variable resistance element which has been coupled to a termination of the first signal delay element, an asymmetrical voltage signal is generated to a matching end of this first signal delay element, and a voltage signal which has been obtained through this voltage signal and the second signal delay element is weighted, and subtracted and amplified.

CONSTITUTION: One end of a delay element 2A is coupled to a signal input terminal IN through a line matching resistance 1, and to the other end of this delay element 2B, a terminal reflection resistance 5 which can set optionally a reflection factor of a signal is connected. Also, to one end of the delay element 2B, a voltage divider 3 used for weighting is connected, and its voltage dividing terminal is connected to a - input terminal of a differential amplifier 4. Moreover, one end of another delay element 2A is coupled to the signal input terminal IN, and to the other end thereof, a terminal matching resistance 6 for eliminating a reflection of a signal is connected, and also it is connected to a + input terminal of the differential amplifier 4.