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Title:
WIRELESS RECEPTION CIRCUIT, WIRELESS TRANSCEIVER CIRCUIT, AND CALIBRATION METHOD THEREOF
Document Type and Number:
Japanese Patent JP2009017455
Kind Code:
A
Abstract:

To solve the problem that a conventional digital calibration type analog/digital converter is disabled from settling calibration within a preamble term of a packet signal.

While utilizing a beacon signal, a polling signal or a signal of another user or while utilizing a signal applied from a transmission unit to a reception unit, digital calibration of an analog/digital converter is performed. For power consumption reduction, in particular, the circuit is partially or entirely brought into sleep mode, excepting for data reception and analog/digital converter calibration, a signal monitoring unit detects existence of another signal, and the circuit in a sleep state is caused to wake up from the sleep mode to perform the calibration of the analog/digital converter.


Inventors:
OSHIMA TAKASHI
YAMAWAKI DAIZO
Application Number:
JP2007179701A
Publication Date:
January 22, 2009
Filing Date:
July 09, 2007
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M1/10; H03G3/20; H03G3/30; H03M1/12; H04B3/11
Domestic Patent References:
JP2005229518A2005-08-25
JP2006121146A2006-05-11
Attorney, Agent or Firm:
Polaire Patent Business Corporation