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Title:
WIRING BOARD, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2006286782
Kind Code:
A
Abstract:

To provide a method of manufacturing a wiring board for reducing curvature remarkably, while maintaining package reliability by controlling the increase in the time of the assembly process of a semiconductor device.

The method of manufacturing a semiconductor device comprises(a) a process for connecting a first semiconductor chip 21 and a second semiconductor chip 21 to a circuit wiring 11, respectively, including two or more holes (14) penetrated from one field to a field of another side, from both sides of a wiring board 1 provided with the circuit wiring 11 in an insulating layer 2 which can be impregnated with an underfill resin 31, and the insulating layer 2; (b) a process wherein the underfill resin 31 is impregnated from one wiring board 1 side; and (c) a process for hardening the underfill resin 31 so that the first and second semiconductor chips 21 and the wiring board 1 may unify.


Inventors:
SHOJI KAZUTAKA
Application Number:
JP2005102582A
Publication Date:
October 19, 2006
Filing Date:
March 31, 2005
Export Citation:
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Assignee:
ELPIDA MEMORY INC
International Classes:
H01L21/56; H01L21/60; H01L23/28; H01L25/00; H01L25/065; H01L25/07; H01L25/18; H05K3/28
Attorney, Agent or Firm:
Minoru Kudo