Title:
WRITE CONTROL FOR REGISTER
Document Type and Number:
Japanese Patent JP3931751
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To perform write control for a register provided in a peripheral device of a computer by using an address space more efficiently.
SOLUTION: As a plurality of write modes, the following are set: a mode in which writing of only write data with the value of 1 is valid; a mode in which writing of only write data with the value of 0 is valid; and a mode in which writing of every write data is valid. In the provided data of n bits (n is an integer of three or above), two bits are set as mask data, and (n-2) bits are set as write data. Among the plurality of write modes, according to a write mode selected with the mask data of two bits, for every bit of the write data of (n-2) bits, whether the writing is valid or invalid is selected. According to the selected result, write processing is performed only for a bit in a register which corresponds to the write data whose writing is valid.
Inventors:
Kenichiro Tomita
Application Number:
JP2002202173A
Publication Date:
June 20, 2007
Filing Date:
July 11, 2002
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G06F12/04; G06F12/00; (IPC1-7): G06F12/04; G06F12/00
Domestic Patent References:
| JP4353927A | ||||
| JP4291641A | ||||
| JP2001195384A | ||||
| JP4044136A | ||||
| JP4241650A |
Attorney, Agent or Firm:
Meisei International Patent Office